chipflow_lib.platforms ====================== .. py:module:: chipflow_lib.platforms .. autoapi-nested-parse:: Platform definititions ---------------------- This module defines the functionality you use in you code to target the ChipFlow platform Classes ------- .. autoapisummary:: chipflow_lib.platforms.PinSignature Functions --------- .. autoapisummary:: chipflow_lib.platforms.OutputPinSignature chipflow_lib.platforms.InputPinSignature chipflow_lib.platforms.BidirPinSignature Package Contents ---------------- .. py:class:: PinSignature(direction, width = 1, all_have_oe = False, init=None) Bases: :py:obj:`amaranth.lib.wiring.Signature` An :py:obj:`Amaranth Signature ` used to decorate wires that would usually be brought out onto a port on the package. This class is generally not directly used. Instead, you would typically utilize the more specific :py:obj:`InputPinSignature`, :py:obj:`OutputPinSignature`, or :py:obj:`BidirPinSignature` for defining pin interfaces. :param direction: Input, Output or Bidir :param width: width of port, default is 1 :param all_have_oe: controls whether each output wire is associated with an individual Output Enable bit or a single OE bit will be used for entire port, the default value is False, indicating that a single OE bit controls the entire port. :param init: a :ref:`const-castable object ` for the initial values of the port .. py:property:: direction :type: amaranth.lib.io.Direction The direction of the IO port .. py:method:: width() The width of the IO port, in wires .. py:method:: options() Options set on the io port at construction Valid options are: "all_have_oe": For a bidirectional port, each wire can have it's direction dynamically controlled seperately, so each wire also has a corresponding Output Enable wire. "init": the initial value that this io port will have at power-up and reset. .. py:method:: annotations(*args) Annotate an interface object. Subclasses of :class:`Signature` may override this method to provide annotations for a corresponding interface object. The default implementation provides none. See :mod:`amaranth.lib.meta` for details. :returns: :py:`tuple()` :rtype: iterable of :class:`~.meta.Annotation` .. py:function:: OutputPinSignature(width, **kwargs) This creates an :py:obj:`Amaranth Signature ` which is then used to decorate package output signals intended for connection to the physical pads of the integrated circuit package. :param width: specifies the number of individual output wires within this port, each of which will correspond to a separate physical pad on the integrated circuit package. :type width: int :param init: a :ref:`const-castable object ` for the initial values of the port .. py:function:: InputPinSignature(width, **kwargs) This creates an :py:obj:`Amaranth Signature ` which is then used to decorate package input signals intended for connection to the physical pads of the integrated circuit package. :param width: specifies the number of individual input wires within this port, each of which will correspond to a separate physical pad on the integrated circuit package. :type width: int :param init: a :ref:`const-castable object ` for the initial values of the port .. py:function:: BidirPinSignature(width, **kwargs) This creates an :py:obj:`Amaranth Signature ` which is then used to decorate package bi-directional signals intended for connection to the physical pads of the integrated circuit package. :param width: specifies the number of individual input/output wires within this port. Each pair of input/output wires will correspond to a separate physical pad on the integrated circuit package. :type width: int :param all_have_oe: controls whether each output wire is associated with an individual Output Enable bit or a single OE bit will be used for entire port, the default value is False, indicating that a single OE bit controls the entire port. :type all_have_oe: bool, optional :param init: a :ref:`const-castable object ` for the initial values of the port