chipflow_lib.platforms¶

This module defines the functionality you use in you code to target the ChipFlow platform

Classes¶

`SiliconPlatformPort`	Represents an abstract library I/O port that can be passed to a buffer.
`IOSignature`	An `Amaranth Signature` used to decorate wires that would usually be brought out onto a port on the package.
`IOModel`	Setting for IO Ports (see also base class IOModelOptions)
`IOTripPoint`	Models various options for trip points for inputs.
`IOModelOptions`	Options for an IO pad/pin.
`Sky130DriveMode`	Models the potential drive modes of an IO pad.

Functions¶

`OutputIOSignature`(width, **kwargs)	This creates an `Amaranth Signature` which is then used to decorate package output signals
`InputIOSignature`(width, **kwargs)	This creates an `Amaranth Signature` which is then used to decorate package input signals
`BidirIOSignature`(width, **kwargs)	This creates an `Amaranth Signature` which is then used to decorate package bi-directional signals

Package Contents¶

class chipflow_lib.platforms.SiliconPlatformPort(name, port_desc, *, invert=False)¶

Bases: amaranth.lib.io.PortLike

Represents an abstract library I/O port that can be passed to a buffer.

The port types supported by most platforms are SingleEndedPort and DifferentialPort. Platforms may define additional port types where appropriate.

Note

amaranth.hdl.IOPort is not an instance of amaranth.lib.io.PortLike.

Parameters:

name (str)
port_desc (chipflow_lib.platforms._utils.PortDesc)
invert (bool)

property direction¶

Direction of the port.

Return type:: Direction

class chipflow_lib.platforms.IOSignature(**kwargs)¶

Bases: amaranth.lib.wiring.Signature

An Amaranth Signature used to decorate wires that would usually be brought out onto a port on the package. This class is generally not directly used. Instead, you would typically utilize the more specific InputIOSignature, OutputIOSignature, or BidirIOSignature for defining pin interfaces.

Parameters:: kwargs (typing_extensions.Unpack[IOModel])

property direction: amaranth.lib.io.Direction¶

The direction of the IO port

Return type:: amaranth.lib.io.Direction

property width: int¶

The width of the IO port, in wires

Return type:: int

property invert: collections.abc.Iterable[bool]¶

A tuple as wide as the IO port, with a bool for the polarity inversion for each wire

Return type:: collections.abc.Iterable[bool]

property options: IOModelOptions¶

Options set on the io port at construction

Return type:: IOModelOptions

annotations(*args)¶

Annotate an interface object.

Subclasses of Signature may override this method to provide annotations for a corresponding interface object. The default implementation provides none.

See amaranth.lib.meta for details.

Returns:: tuple()
Return type:: iterable of Annotation

class chipflow_lib.platforms.IOModel¶

Bases: IOModelOptions

Setting for IO Ports (see also base class IOModelOptions)

Attributes:

direction – io.Direction.Input, io.Direction.Output or io.Direction.Bidir
width – width of port, default is 1

class chipflow_lib.platforms.IOTripPoint¶

Bases: enum.StrEnum

Models various options for trip points for inputs. Depending on process and cell library, these may be statically or dynamically configurable.

You will get an error if the option is not available with the chosen process and cell library

class chipflow_lib.platforms.IOModelOptions¶

Bases: typing_extensions.TypedDict

Options for an IO pad/pin.

Attributes:

invert – Polarity inversion. If the value is a simple bool, it specifies inversion for the entire port. If the value is an iterable of bool, the iterable must have the same length as the width of io, and the inversion is specified for individual wires.
individual_oe – controls whether each output wire is associated with an individual Output Enable bit or if a single OE bit will be used for entire port. The default value is False (indicating that a single OE bit controls the entire port).
power_domain – The name of the I/O power domain. NB there is only one of these, so IO with multiple power domains must be split up.
clock_domain – the name of the I/O’s clock domain (see Amaranth.ClockDomain). NB there is only one of these, so IO with multiple clocks must be split up.
buffer_in – Should the IO pad have an input buffer?
buffer_out – Should the IO pad have an output buffer?
sky130_drive_mode – Drive mode for output buffer on sky130
trip_point – Trip Point configutation for input buffer
init – The value for the initial values of the port
init_oe – The value for the initial values of the output enable(s) of the port

chipflow_lib.platforms.OutputIOSignature(width, **kwargs)¶

This creates an Amaranth Signature which is then used to decorate package output signals intended for connection to the physical pads of the integrated circuit package.

Parameters:

width (int) – specifies the number of individual output wires within this port, each of which will correspond to a separate physical pad on the integrated circuit package.
kwargs (typing_extensions.Unpack[IOModelOptions])

chipflow_lib.platforms.InputIOSignature(width, **kwargs)¶

This creates an Amaranth Signature which is then used to decorate package input signals intended for connection to the physical pads of the integrated circuit package.

Parameters:

width (int) – specifies the number of individual input wires within this port, each of which will correspond to a separate physical pad on the integrated circuit package.
kwargs (typing_extensions.Unpack[IOModelOptions])

chipflow_lib.platforms.BidirIOSignature(width, **kwargs)¶

This creates an Amaranth Signature which is then used to decorate package bi-directional signals intended for connection to the physical pads of the integrated circuit package.

Parameters:

width (int) – specifies the number of individual input/output wires within this port. Each pair of input/output wires will correspond to a separate physical pad on the integrated circuit package.
kwargs (typing_extensions.Unpack[IOModelOptions])

class chipflow_lib.platforms.Sky130DriveMode¶

Bases: enum.StrEnum

Models the potential drive modes of an IO pad. Depending on process and cell library, these may be statically or dynamically configurable.

You will get an error if the option is not available with the chosen process and cell library